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Volume 1 / 1990 - Volume 27 / 2011
369
Editorial
Vishwani D. Agrawal
371-372
Test Technology Newsletter - October 2007 The Newsletter of the Test Technology Technical Council of the IEEE Computer Society
Bruce Kim
373-388
Too Few or Too Many Properties? Measure it by ATPG!
Franco Fummi and Graziano Pravadelli
389-404
A System-layer Infrastructure for SoC Diagnosis
P. Bernardi, M. Grosso, M. Rebaudengo and M. Sonza Reorda
405-420
Dynamic Fault Diagnosis of Combinational and Sequential Circuits on Reconfigurable Hardware
Fatih Kocan and Daniel G. Saab
421-434
A Novel EDA Tool for VLSI Test Vectors Management
Walid Ibrahim
435-444
Analysis and Test of Resistive-Open Defects in SRAM Pre-Charge Circuits
Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel and Magali Bastian
445-455
Functional Constraints vs. Test Compression in Scan-Based Delay Testing
Ilia Polian and Hideo Fujiwara
457-464
Securing Scan Control in Crypto Chips
David Hély, Frédéric Bancel, Marie-Lise Flottes and Bruno Rouzeyre
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