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Book Chapter
Proof Engineering in the Large: Formal Verification of Pentium®4 Floating-Point Divider
Book Series
Lecture Notes in Computer Science
Publisher
Springer Berlin / Heidelberg
ISSN
0302-9743 (Print) 1611-3349 (Online)
Volume
Volume 2144/2001
Book
Correct Hardware Design and Verification Methods
DOI
10.1007/3-540-44798-9
Copyright
2001
ISBN
978-3-540-42541-0
DOI
10.1007/3-540-44798-9_18
Pages
196-211
Subject Collection
Computer Science
SpringerLink Date
Saturday, January 01, 2000
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Proof Engineering in the Large: Formal Verification of Pentium®4 Floating-Point Divider
Roope Kaivola
6
and Katherine Kohatsu
6
(6)
Intel Corporation, JF4-451, 2111 NE 25th Avenue, Hillsboro, OR 97124, USA
Abstract
We examine the challenges presented by large-scale formal verification of industrial-size circuits, based on our experiences in verifying the class of all micro-operations executing on the floating-point division and square root unit of the Intel IA-32 Pentium®4 microprocessor. The verification methodology is based on combining human-guided mechanised theorem-proving with low-level steps verified by fully automated model-checking. A key observation in the work is the need to explicitly address the issues of proof design and proof engineering, i.e. the process of creating proofs and the craft of structuring and formulating them, as concerns on their own right.
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