In this paper we describe an efficient and secure hardware implementation of the RSA cryptosystem. Modular exponentiation is based on Montgomery’s method without any modular reduction achieving the optimal bound. The presented systolic array architecture is scalable in severalparameters which makes it possible to implement Compaq’s MultiPrime ^TM in a very efficient way. According to a developed performance model the influence of different parameters is investigated. This platform is optimised for Multiprime as an example for the RSA cryptosystem. In this work we give details about this scheme, which uses three or more factors of the composite N. Security of this scheme, related to this architecture is also presented.