Performance Analysis and Parallel Implementation of Dedicated Hash Functions
Junko Nakajima5
and Mitsuru Matsui5 
| (5) |
Mitsubishi Electric Corporation, 5-1-1 Ofuna, Kamakura, Kanagawa 247-8501, Japan |
Abstract
This paper shows an extensive software performance analysis of dedicated hash functions, particularly concentrating on Pentium
III, which is a current dominant processor. The targeted hash functions are MD5, RIPEMD-128-160, SHA-1-256-512 and Whirlpool,
which fully cover currently used and future promising hashing algorithms. We try to optimize hashing speed not only by carefully
arranging pipeline scheduling but also by processing two or even three message blocks in parallel using MMX registers for
32-bit oriented hash functions. Moreover we thoroughly utilize 64-bit MMX instructions for maximizing performance of 64-bit
oriented hash functions, SHA-512 and Whirlpool. To our best knowledge, this paper gives the first detailed measured performance
analysis of SHA-256, SHA-512 and Whirlpool.
Keywords dedicated hash functions - parallel implementations - Pentium III
References secured to subscribers.