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Implementation and Evaluation of OpenMP for Hitachi SR8000
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38. Implementation and Evaluation of OpenMP for Hitachi SR8000
Yasunori Nishitani8 , Kiyoshi Negishi8 , Hiroshi Ohta9 and Eiji Nunohiro8 
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Software Development Division, Hitachi, Ltd., 244-0801 Yokohama, Kanagawa, Japan |
| (9) |
Systems Development Laboratry, Hitachi, Ltd., 215-0013 Kawasaki, Kanagawa, Japan |
Abstract
This paper describes the implementation and evaluation of the OpenMP compiler designed for the Hitachi SR8000 Super Technical
Server. The compiler performs parallelization for the shared memory multiprocessors within a node of SR8000 using the synchronization
mechanism of the hardware to perform high-speed parallel execution. To create an optimized code, the compiler can perform
optimizations across inside and outside of a PARALLEL region or can produce a code optimized for a fixed number of processors
according to the compile option. For user’s convenience, it supports combination of OpenMP and automatic parallelization or
Hitachi proprietary directive and also supports reporting diagnostic messages which help user’s parallelization. We evaluate
our compiler by parallelizing NPB2.3-serial benchmark with OpenMP. The result shows 5.3 to 8.0 times speedup on 8 processors.
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