In this paper we derive exemplarily a parallel processor array for algorithms of commonly used tomographic reconstruction
methods by using the tools of the design system DESA. The algorithms represent a group of computationally intensive image
processing algorithms requiring high throughput and real-time processing.
The design process is characterized by the consideration of hardware constraints and performance criteria. In particular,
we determine one common parallel processor array for two different reconstruction techniques. Finally, the array is adapted
to hardware constraints given by the target architecture which can be an application specific integrated circuit or a system
of parallel digital signal processors.
The research was supported by the ”Deutsche Forschungsgemeinschaft“, in the project A1/SFB 358.