High-end microprocessors achieve their performance as a result of adding more features and therefore increasing their complexity.
In this paper we present DDM-CMP, a Chip-Multiprocessor using the Data-Driven Multithreading execution model.
As a proof-of-concept we present a DDM-CMP configuration with the same hardware budget as a high-end processor. In that budget
we implement four simpler CPUs, the TSUs, and the interconnection network. An estimation of DDMCMP performance for the execution
of SPLASH-2 kernels shows that, for the same clock frequency, DDM-CMP achieves a speedup of 2.6 to 7.6 compared to the high-end
processor. A lower frequency configuration, which is more powerefficient, still achieves high speedup (1.1 to 3.3). These
encouraging results lead us to believe that the proposed architecture has a significant benefit over traditional designs.