In this paper we present a class of VLSI networks for computing the Discrete Fourier Transform and the product of two N-bit integers. These networks match, within a constant factor, the known theoretical lower-bound O(N²) to the area × (time)² measure of complexity. While this paper's contribution is mainly theoretical, it points toward very practical directions: we show how to design multipliers with area A = O(N) and time T=O(N) on one hand, and A=0((N/log²N)²), T = O(log²N) on the other. Both of these designs should be contrasted with the currently available multipliers, whose performances are A=O(N), T=O(N) or even A=O(N²), T=O(N).