Content Addressable Memories or CAMs are popular parallel matching circuits. They provide the capability, in hardware, to search a table of data for a matching entry. This functionality is a high performance alternative to popular software-based searching schemes. CAMs are typically found in embedded circuitry where fast matching is essential. This paper presents a novel approach to CAM implementation using FPGAs and run-time reconfiguration. This approach produces CAM circuits that are smaller, faster and more flexible than traditional approaches.