Advances in interconnection network performance and interprocessor interaction mechanisms enable the construction of fine-grain
parallel computers in which the nodes are physically small and have a small amount of memory. This class of machines has a
much higher ratio of processor to memory area and hence provides greater processor throughput and memory bandwidth per unit
cost relative to conventional memory-dominated machines. This paper describes the technology and architecture trends motivating
fine-grain architecture and the enabling technologies of high-performance interconnection networks and low-overhead interaction
mechanisms. We conclude with a discussion of our experiences with the J-Machine, a prototype fine-grain concurrent computer.
Keywords Parallel Processing - Concurrent Computing - Multicomputers - Multiprocessors - Grain-Size - Balance - Mechanisms - Interconnection Networks
The research described in this paper was supported in part by the Defense Advanced Research Projects Agency under contracts
N00014-88K-0738 and N00014-87K-0825, in part by a National Science Foundation Presidential Young Investigator Award, grant
MIP-8657531, with matching funds from General Electric Corporation and IBM Corporation, and in part by assistance from Intel
Corporation.
William J. Dally, Ph. D: He received the B.S. degree in Electrical Engineering from Virginia Polytechnic Institute, the M.S. degree in Electrical
Engineering from Stanford University, and the Ph. D degree in Computer Science from Caltech. He has worked at Bell Telephone
Laboratories where he contributed to the design of the BELLMAC32 microprocessor. Later as a consultant to Bell Laboratories
he helped design the MARS hardware accelerator. He was a Research Assistant and then a Research Fellow at Caltech where he
designed the MOSSIM Simulation Engine and the Torus Routing Chip. He is currently an Associate Professor of Computer Science
at the Massachusetts Institute of Technology where he directs a research group that is building the J-Machine, a fine-grain
concurrent computer. His research interests include concurrent computing, computer architecture, computer aided design, and
VLSI design.