Proof engineering in the large: formal verification of Pentium®4 floating-point divider

Roope Kaivola and Katherine Kohatsu

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Abstract

We examine the challenges presented by large-scale formal verification of industrial-size circuits, based on our experiences in verifying the class of all micro-operations executing on the floating-point division and square root unit of the Intel IA-32 Pentium®4 microprocessor. The verification methodology is based on combining human-guided mechanised theorem-proving with low-level steps verified by fully automated model-checking. A key observation in the work is the need to explicitly address the issues of proof design and proof engineering, i.e., the process of creating proofs and the craft of structuring and formulating them, as concerns on their own right.

Key words: Formal verification – Arithmetic – Microprocessor

Published online: 19 November 2002

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