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Yong Dou, Ralf Gruber and Josef M. Joller
Front matter
1-10
A Fast Scheme to Investigate Thermal-Aware Scheduling Policy for Multicore Processors
11-27
Dealing with Traffic-Area Trade-Off in Direct Coherence Protocols for Many-Core CMPs
28-40
An Efficient Lightweight Shared Cache Design for Chip Multiprocessors
41-53
A Novel Cache Organization for Tiled Chip Multiprocessor
54-66
A Performance Model for Run-Time Reconfigurable Hardware Accelerator
67-81
SPMTM: A Novel ScratchPad Memory Based Hybrid Nested Transactional Memory Framework
82-94
Implementation of Rotation Invariant Multi-View Face Detection on FPGA
95-109
The Design and Evaluation of a Selective Way Based Trace Cache
110-122
A Fine-Grained Pipelined Implementation for Large-Scale Matrix Inversion on FPGA
123-133
L1 Collective Cache: Managing Shared Data for Chip Multiprocessors
134-149
Efficient Multiplication of Polynomials on Graphics Hardware
150-164
Performance Optimization Strategies of High Performance Computing on GPU
165-176
A Practical Approach of Curved Ray Prestack Kirchhoff Time Migration on GPGPU
177-190
GCSim: A GPU-Based Trace-Driven Simulator for Multi-level Cache
191-204
A Hybrid Parallel Signature Matching Model for Network Security Applications Using SIMD GPU
205-219
HPVZ: A High Performance Virtual Computing Environment for Super Computers
220-229
High Performance Support of Lustre over Customized HSNI for HPC
230-245
ViroLab Security and Virtual Organization Infrastructure
246-258
E2EDSM: An Edge-to-Edge Data Service Model for Mass Streaming Media Transmission
259-272
Iso-Level CAFT: How to Tackle the Combination of Communication Overhead Reduction and Fault Tolerance Scheduling
273-287
MaGate Simulator: A Simulation Environment for a Decentralized Grid Scheduler
288-301
A Distributed Shared Memory Architecture for Occasionally Connected Mobile Environments
302-312
Time-Adaptive Vertical Handoff Triggering Methods for Heterogeneous Systems
313-322
Energy-Saving Topology Control for Heterogeneous Ad Hoc Networks
323-329
Computational Performance of a Parallelized Three-Dimensional High-Order Spectral Element Toolbox
330-340
Research on Evaluation of Parallelization on an Embedded Multicore Platform
341-355
MapReduce-Based Pattern Finding Algorithm Applied in Motif Detection for Prescription Compatibility Network
356-362
Parallelization of the LEMan Code with MPI and OpenMP
363-374
The Recursive Dual-Net and Its Applications
375-388
Parallelization Strategies for Mixed Regular-Irregular Applications on Multicore-Systems
389-407
Performance Improvement of Multimedia Kernels by Alleviating Overhead Instructions on SIMD Devices
408-419
Large Matrix Multiplication on a Novel Heterogeneous Parallel DSP Architecture
420-435
Implementing Fast Packet Filters by Software Pipelining on x86 Processors
436-451
OSL: Optimized Bulk Synchronous Parallel Skeletons on Distributed Arrays
452-464
Evaluating SPLASH-2 Applications Using MapReduce
465-476
MPTD: A Scalable and Flexible Performance Prediction Framework for Parallel Systems
Back matter
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