Welcome!
To use the personalized features of this site, please log in or register.
If you have forgotten your username or password, we can help.
|
 |
A FPGA-based Library for On-Line Signal Processing
| |
|
A FPGA-based Library for On-Line Signal Processing Dannie Lau1, Aaron Schneider2, Milos D. Ercegovac2 and John Villasenor1 | (1) | UCLA, University of California, Los Angeles, 56-125B, Engr. IV Bldg., Los Angeles, CA, 90095-1594 |
| (2) | Department of Computer Science, UCLA, University of California, Los Angeles, 56-125B, Engr. IV Bldg., Los Angeles, CA, 90095-1594 |
Abstract A library of on-line arithmetic structures is presented. Their ability to produce and consume the most significant digit first allows subsequent computations to begin earlier, shortens the execution time of variable precision and composite operations, and simplifies interconnection networks which can help preserve high clock rates in large digit-serial designs. More importantly, designers can interconnect individual units without designing intermediate structures to reformat data, a luxury that is currently unavailable to FPGA designers wishing to use bit-serial arithmetic. The on-line structures introduced are small, and can be easily combined to yield more powerful blocks. The library''s applicability to signal processing applications is demonstrated with the DFT, DCT, and FIR filter. Results indicate high area efficiency and rapid execution speed. on-line arithmetic - DSP - FFT - DCT - configurable computing
Fulltext Preview (Small, Large)
|
|
|
|
|
|