This paper describes the implementation of an evolvable hardware system on the Virtex Family of devices. The evaluation of the circuits is done intrinsically by downloading a portion of the bitstream that describes the changes from the baseline circuit. This reconfiguration system is achieved through the use of the Xilinx JBits API to identify and extract the changing bitstream. This partial reconfiguration process is very much faster than the previous methods of complete reconfiguration, leading to the complete evolution of a simple circuit in less than half an hour