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Traceback-Based Optimizations for Maximum a Posteriori Decoding Algorithms

Curt Schurgers1, 2 Contact Information and Anantha Chandrakasan2

(1)  Present address: Electrical and Computer Engineering, University of California San Diego, 9500 Gilman Dr., La Jolla, CA 92093-0407, USA
(2)  Microsystems Technology Laboratories, Massachusetts Institute of Technogy, Cambridge, MA 02139, USA

Received: 7 May 2007  Accepted: 7 December 2007  Published online: 28 May 2008

Abstract  Maximum A Posteriori (MAP) decoding is a crucial enabler of turbo coding and other powerful feedback-based algorithms. To allow pervasive use of these techniques in resources constrained systems, it is important to limit their implementation complexity, without sacrificing the superior performance they are known for. We show that introducing traceback information into the MAP algorithm, thereby leveraging components that are also part of Soft-Output Viterbi Algorithms (SOVA), offers two unique possibilities to simplify the computational requirements. Our proposed enhancements are effective at each individual decoding iteration and therefore provide gains on top of existing techniques such as early termination and memory optimizations. Based on these enhancements, we will present three new architectural variants for the decoder. Each one of these may be preferable depending on the decoder memory hardware requirements and number of trellis states. Computational complexity is reduced significantly, without incurring significant performance penalty.

Keywords  error correction coding - MAP estimation - very-large-scale integration


Contact Information Curt Schurgers
Email: curts@ece.ucsd.edu

Curt Schurgers   is currently an assistant professor at the University of California, San Diego. He received his M.S. degree from the Katholieke Universiteit Leuven in Belgium in 1997, and his Ph.D. from UCLA in 2002. He was also a researcher at the Interuniversity Microelectronics Center in Belgium (1997-1999), and a postdoctoral researcher at MIT (2003). His research interests include energy efficient communication systems, sensor networks and underwater networks.
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Anantha P. Chandrakasan   received the B.S, M.S. and Ph.D. degrees in Electrical Engineering and Computer Sciences from the University of California, Berkeley, in 1989, 1990, and 1994 respectively. Since September 1994, he has been with the Massachusetts Institute of Technology, Cambridge, where he is currently the Joseph F. and Nancy P. Keithley Professor of Electrical Engineering. He was a co-recipient of several awards including the 1993 IEEE Communications Society’s Best Tutorial Paper Award, the IEEE Electron Devices Society’s 1997 Paul Rappaport Award for the Best Paper in an EDS publication during 1997, the 1999 DAC Design Contest Award, the 2004 DAC/ISSCC Student Design Contest Award, the 2007 ISSCC Beatrice Winner Award for Editorial Excellence and the 2007 ISSCC Jack Kilby Award for Outstanding Student Paper. His research interests include low-power digital integrated circuit design, wireless microsensors, ultra-wideband radios, and emerging technologies. He is a co-author of Low Power Digital CMOS Design (Kluwer Academic Publishers, 1995), Digital Integrated Circuits (Pearson Prentice-Hall, 2003, 2nd edition), and Subthreshold Design for Ultra-Low Power Systems (Springer 2006). He is also a co-editor of Low Power CMOS Design (IEEE Press, 1998), Design of High-Performance Microprocessor Circuits (IEEE Press, 2000), and Leakage in Nanometer CMOS Technologies (Springer, 2005). He has served as a technical program co-chair for the 1997 International Symposium on Low Power Electronics and Design (ISLPED), VLSI Design '98, and the 1998 IEEE Workshop on Signal Processing Systems. He was the Signal Processing Sub-committee Chair for ISSCC 1999–2001, the Program Vice-Chair for ISSCC 2002, the Program Chair for ISSCC 2003, and the Technology Directions Sub-committee Chair for ISSCC 2004–2008. He was an Associate Editor for the IEEE Journal of Solid-State Circuits from 1998 to 2001. He served on SSCS AdCom from 2000 to 2007 and he was the meetings committee chair from 2004 to 2007. He is the Technology Directions Chair for ISSCC 2009. He is the Director of the MIT Microsystems Technology Laboratories.
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