The DIVA (Data IntensiVe Architecture) system incorporates Processing-In-Memory (PIM) chips as smart-memory coprocessors to
a host microprocessor. It exploits the inherently high on-chip memory bandwidth and additionally provides a separate memory-to-memory
high-bandwidth interconnect across the system. By design, the DIVA system architecture targets a broad range of applications,
including those with irregular data access patterns. At the same time, DIVA supports familiar programming paradigms from parallel
computing and offers an evolutionary migration path for applicatioin development.
The DIVA project is constructing a demonstration system using a conventional superscalar host processor with a main memory
composed of VLSI PIM chips in place of standard DRAMs. This system has a novel mix of operating-system challenges, combining
aspects of conventional “dumb” memory management and both shared- and distributed-memory multiprocessor operations. This paper
describes our solutions to be memory-management problemsposed by this multifaceted environment.