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Hardware Implementation of Block-based Motion Estimation for Real Time Applications
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Hardware Implementation of Block-based Motion Estimation for Real Time Applications
Maher E. Rizkalla1 , Paul Salama1, Mohamed El-Sharkawy1 and Modukuri Sushmitha1
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Department of Electrical and Computer Engineering, Purdue School of Engineering and Technology, Indiana University Purdue University Indianapolis, 723W Michigan Street, Indianapolis, IN 46202, USA |
Received: 31 October 2005 Revised: 31 October 2005 Accepted: 1 December 2006 Published online: 5 May 2007
Abstract This work describes the VHDL design and implementation of block-based motion estimation in order to make it feasible for real-time
video applications. The design was functionally tested and simulated using ModelSim from Mentor Graphics tools, and then verified
using both a VHDL testbench and the Matlab® Image processing tools. The design was tested for different image sizes at different
clock frequencies with varying block sizes and search areas. With a clock frequency of 400 MHz, the estimated time for motion
estimation for QCIF and CIF sequences shows the feasibility for real-time video-codec.
Keywords motion estimation - fast search algorithms - exhaustive search algorithm - VLSI - VHDL implementation - finite state machine
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