SHA: A Design for Parallel Architectures?
Antoon Bosselaers5
, René Govaerts5 and Joos Vandewalle5
| (5) |
Dept. Electrical Engineering-ESAT, Katholieke Universiteit Leuven, Kardinaal Mercierlaan 94, B-3001 Heverlee, Belgium |
Abstract
To enhance system performance computer architectures tend to incorporate an increasing number of parallel execution units.
This paper shows that the new generation of MD4-based customized hash functions (RIPEMD-128, RIPEMD-160, SHA-1) contains much
more software parallelism than any of these computer architectures is currently able to provide. It is conjectured that the
parallelism found in SHA-1 is a design principle. The critical path of SHA-1 is twice as short as that of its closest contender
RIPEMD-160, but realizing it would require a 7-way multiple-issue architecture. It will also be shown that, due to the organization
of RIPEMD-160 in two independent lines, it will probably be easier for future architectures to exploit its software parallelism.
Key words Cryptographic hash functions - instruction-level parallelism - multiple-issue architectures - critical path analysis
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