Sigma-delta ADC implementations today commonly make use of multi-bit architectures. The noise performance benefits of multi-bit implementations may be used for improvement in dynamic range or for reduction in oversampling ratio, relative to single-bit implementations. The performance and the limitations of several multi-bit architectures are presented and analyzed herein. The architectures studied include single-stage, truncation feedback, and cascaded multi-bit architectures. Additional architecture options, including inter-stage gain and analog feedforward, are also studied. Performance considerations for these various multi-bit architectures are compared with one another.