Optimizing Drain Current, Inversion Level, and Channel Length in Analog CMOS Design

D. M. Binkley, B. J. Blalock and J. M. Rochelle

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Abstract

This paper describes a methodology for selecting drain current, inversion level (represented by inversion coefficient), and channel length for optimum performance tradeoffs in analog CMOS design. Here, inversion coefficient replaces width as a design choice to permit a conscious optimization of inversion level while width is implicitly considered. Transconductance, gate-referred thermal-noise voltage, and drain-source saturation voltage are optimized towards weak inversion while transconductance linearity and drain-referred thermal-noise current are optimized in strong inversion. Voltage gain, flicker noise, and dc mismatch are optimized towards weak inversion at long channel length while bandwidth is optimized in strong inversion at short channel length. Optimization expressions are given along with measured transconductance efficiency and Early voltage from weak through strong inversion over a wide range of channel lengths. Transconductance efficiency and Early voltage are used as normalized measures of transconductance and drain-source resistance, independent of drain current. The methodology presented is used to design three 0.5-μm operational transconductance amplifiers having equal 50-μA bias currents, but different tradeoffs in gain, bandwidth, noise, and dc mismatch. The amplifiers have measured voltage gains of 16.8, 110, and 326 V/V, −3-dB bandwidths of 350, 51, and 5 MHz, input-referred flicker-noise voltage at 100 Hz of 2,000, 450, and 58 nV/Hz1/2, and input-referred dc mismatch voltages of 10.2, 2.2, and 1.1 mV respectively. The design methodology can be readily extended to deeper submicron CMOS processes.

Key Words  analog MOS - CMOS design - design methodology - optimization - weak - moderate - and strong inversion - MOS sizing - tiransconductance efficiency - early voltage - intrinsic voltage gain - intrinsic bandwidth - dc voltage and current mismatch - thermal and flicker noise - operational transconductance amplifier

David M. Binkley (S’81, M’82, SM’93) joined the University of North Carolina at Charlotte in 2000 as an associate professor in the electrical and computer engineering department. Dr. Binkley and his students are researching analog design and testing methodologies including micropower, low-noise analog CMOS design for neural implants and radiation hardened, deep space applications. Dr. Binkley was a cofounder and vice president of integrated circuit development at Concorde Microsystems and senior scientist at CTI PET Systems where he designed both discrete and integrated CMOS electronics for positron emission tomography (PET) medical imaging systems. Concorde and CTI are currently part of Siemens Medical Solutions. Dr. Binkley received the B.S., M.S., and Ph.D. degrees in electrical engineering from the University of Tennessee, Knoxville. He is the author of over 60 papers in analog circuit design and instrumentation and holds five U.S. patents. Dr. Binkley is currently writing the book, Analog CMOS Design, Tradeoffs and Optimization, for John Wiley and Sons with planned publication in 2006.
Benjamin J. Blalock (S’, M’) received his B.S. degree in electrical engineering from the University of Tennessee, Knoxville, in 1991 and the M.S. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, in 1993 and 1996 respectively. He joined the Department of Electrical and Computer Engineering at Mississippi State University in 1996 and the University of Tennessee in 2001. His current research focus includes mixed-signal/mixed-voltage circuit design for systems-on-a-chip in SOI technology, analog IC design for extreme environments, multi-gate transistors and circuits on SOI, body-driven circuit techniques for ultra low-voltage analog, and bio-microelectronics. He has over 25 publications in the field of analog IC design and has contributed to The Circuits and Filters Handbook. He has also worked as an analog IC design consultant for Cypress Semiconductor Corp. and Concorde Microsystems, Inc.
James M. Rochelle (M’84) received the B.S., M.S., and Ph.D. degrees in Electrical engineering from the University of Tennessee, Knoxville. From 1965 to 1982 he was with the Instrumentation and Controls Division of the Oak Ridge National Laboratory. From 1982 to 2001, he was Associate Professor of Electrical and Computer Engineering at the University of Tennessee, Knoxville teaching and conducting research in integrated circuit device modeling and mixed-signal integrated circuit design. In 2001 he retired from academia and is presently an emeritus associate professor and vice president of ASIC development at Concorde Microsystems, Inc., now part of Siemens Medical Solutions located in Knoxville, Tennessee. His current research interests are mixed-signal ASIC's for medical imaging readout electronics and micropower battery-powered devices.

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