The concept of using reconfigurable hardware such as FPGAs in a PVM enviroment is considered. The Dynamic Reconfiguration of Protocol Stacks (DRoPs) system allowing adaptable protocols and the Reading Template Interface Compiler (RTIC) for specify regular parallel frameworks with PVM are introduced as essential mechanisms for supporting the generation and use of Hardware Objects. How these systems could be augmented to provide Reconfigurable Hardware Objects within PVM is then briefly discussed.