Book Chapter
Technology Mapping
2002, Logic Synthesis and Verification Algorithms, Part IV, Pages 505-521
Book Chapter
Technology Mapping
Leon Stok and Vivek Tiwari
The Kluwer International Series in Engineering and Computer Science, 1, Volume 654, Logic Synthesis and Verification, Pages 115-139
Journal Article
The design of a language for model transformations
Aditya Agrawal, Gabor Karsai, Sandeep Neema, Feng Shi and Attila Vizhanyo
Software and Systems Modeling, 2006, Volume 5, Number 3, Pages 261-288
Book Chapter
Congestion Optimization During Technology Mapping and Logic Synthesis
Integrated Circuits and Systems, 2007, Routing Congestion in VLSI Circuits: Estimation and Optimization, Part III, Pages 189-229
Book Chapter
Logic synthesis for FPGAs using a mixed exclusive-/inclusive-OR form
Nigel Lester and Jonathan Saul
Lecture Notes in Computer Science, 1996, Volume 1142, Field-Programmable Logic Smart Applications, New Paradigms and Compilers, Pages 185-192
Book Chapter
Synthesis-level Metrics for Routing Congestion
Integrated Circuits and Systems, 2007, Routing Congestion in VLSI Circuits: Estimation and Optimization, Part II, Pages 67-94
Journal Article
A minimization version of a directed subgraph homeomorphism problem
Janina A. Brenner, Sándor P. Fekete and Jan C. van der Veen
Mathematical Methods of Operations Research , 2009, Volume 69, Number 2, Pages 281-296
Book Chapter
Exploring a Quantum Theory with Graph Rewriting and Computer Algebra
Aleks Kissinger
Lecture Notes in Computer Science, 2009, Volume 5625, Intelligent Computer Mathematics, Pages 90-105
Journal Article
Characterizing the reconstruction and enumerating the patterns of DNA sequences with repeats
Hsun-Wen Chang and Pei-Fang Tsai
Journal of Combinatorial Optimization, 2007, Volume 14, Numbers 2-3, Pages 331-347
Book Chapter
Vertex partitioning problems on partial k-trees
Arvind Gupta, Damon Kaller, Sanjeev Mahajan and Tom Shermer
Lecture Notes in Computer Science, 1996, Volume 1097, Algorithm Theory — SWAT'96, Pages 161-172