Welcome!
To use the personalized features of this site, please log in or register.
If you have forgotten your username or password, we can help.
My Menu
Saved Items

Tiling and Memory Reuse for Sequences of Nested Loops

Youcef BouchebabaContact Information and Fabien CoelhoContact Information

(5)  CRI, ENSMP, 35, rue Saint Honoré, 77305 Fontainebleau, France
Abstract
Our aim is to minimize the electrical energy used during the execution of signal processing applications that are a sequence of loop nests. This energy is mostly used to transfer data among various levels of memory hierarchy. To minimize these transfers, we transform these programs by using simultaneously loop permutation, tiling, loop fusion with shifting and memory reuse. Each input nest uses a stencil of data produced in the previous nest and the references to the same array are equal, up to a shift. All transformations described in this paper have been implemented in pips, our optimizing compiler and cache misses reductions have been measured.

Contact Information Youcef Bouchebaba
Email: boucheba@cri.ensmp.fr

Contact Information Fabien Coelho
Email: coelho@cri.ensmp.fr
Fulltext Preview (Small, Large)
Image of the first page of the fulltext

References secured to subscribers.



Export this chapter
Export this chapter as RIS | Text
 
Remote Address: 38.107.191.108 • Server: mpweb02
HTTP User Agent: CCBot/1.0 (+http://www.commoncrawl.org/bot.html)