Algorithms to locate multiple design errors using region-based model are studied for both combinational and sequential circuits. The model takes locality aspect of errors and is based on a 3-value, non-enumerative analysis technique. Studies show the effectiveness of the region based model for single and multiple stuck faults and gate connection errors. For sequential circuits, we try to locate the time frame at which the error was first excited, by re-simulating as few vectors as possible preceding the erroneous vector in a fully initialized circuit to carry out the diagnosis. Experimental results on benchmark circuits are used to demonstrate rapid and accurate locating of multiple errors.
This Research was Supported in Part by the New Jersey Commission on Science and Technology.Anand D
Souza received his B.E. in electronics and communication engineering from Karnataka Regional Engineering College, India in 1998 and M.S. in electrical engineering from Rutgers University. Anand is currently pursuing his M.B.A. degree at the University of Chicago
s Graduate School of Business. Prior to joining the University of Chicago, he was working as a DFT engineer in the Processor and Network Products division of Sun Microsystems, Inc., California. His current interests include finance, strategic management and entrepreneurship.
Michael S. Hsiao received the B.S. in computer engineering with highest honors from the University of Illinois at Urbana-Champaign in 1992, and M.S. and Ph.D in electrical engineering in 1993 and 1997, respectively, from the same university. During his studies, he was recipient of the Digital Equipment Corporation Fellowship, McDonnell Douglas Scholarship, and Semiconductor Research Corp. Research Assistantship. Michael is currently an Associate Professor in the Bradley Department of Electrical and Computer Engineering at Virginia Tech in Blacksburg, Virginia. Prior to joining Virginia Tech in 2001, he was an Assistant Professor in the Department of Electrical and Computer Engineering at Rutgers University. In the summer of 1997, Michael was a visiting scientist at NEC USA in Princeton, NJ. During the summer of 2002, he was a visiting professor at Intel in Santa Clara, CA. Michael is a recipient of the National Science Foundation CAREER Award. He has published more than 100 refereed journal and conference papers in the areas of design, test, and verification of complex digital systems, as well as diagnosis and power management of these systems. He serves on the Editorial Board of the Journal of Electronic Testing: Theory and Applications.