Recent years, as the wide deployment of embedded and mobile devices, reducing the power consumption in order to extend the
battery life becomes a major factor that a designer must consider when designing a new architecture. DVS is regarded as one
of the most effective power reduction techniques. This paper focuses on run-time compiler driven DVS for power reduction,
especially two key design issues including DVS analysis model and DVS decision algorithm. Based on the design framework presented
in this work, we also implement a run-time DVS compiler which is fine-grained, adaptive to the program’s running environment
without changing its behavior. The obtained system is deployed in a real hardware platform. Experimental results, based on
some benchmarks, show that with average 5% performance loss, the benchmarks benefit with 26% dynamic power savings and the
energy delay product (EDP) improvement is 22%.
Keywords dynamic compiler - DVS - low power
This work is supported by National Nature Science Foundation of China (60673149).