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Two Schemes to Improve the Performance of a Sort-Last 3D Parallel Rendering Machine with Texture Caches

Alexis VartanianContact Information, Jean-Luc BéchennecContact Information and Nathalie Drach-TemamContact Information

(6)  LRI, Université Paris-Sud, 91405 Orsay, France
Abstract
A sort-last 3D parallel rendering machine distributes the triangles to draw to different processors. When building such a machine with each processor having a texture cache, the texture locality is worse and the performance is reduced. This article investigates two schemes to preserve this locality while keeping a good load balancing: triangle slicing and locality aware triangle distribution. With both schemes, the speedups are improved between 2 and 6 times.

Keywords  Cache memories - multiprocessing - application specific architecture - parallel rendering - texture mapping


Contact Information Alexis Vartanian
Email: alex@lri.fr

Contact Information Jean-Luc Béchennec
Email: jlb@lri.fr

Contact Information Nathalie Drach-Temam
Email: drach@lri.fr
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