The Cell processor is a heterogeneous multi-core processor with one power processing engine (PPE) core and eight synergistic
processing engine (SPE) cores. There is a significant amount of ongoing research in programming models and tools that attempts
to make it easy to exploit the computation power of the Cell architecture. In our work, we explore supporting OpenMP on the
Cell processor. It is attractive to support OpenMP because programmers can continue using their familiar programming model,
and existing code can be re-used. We base our work on IBM’s XL compiler, and developed new components in the XL compiler and
a new runtime library. Three major issues are addressed: (1) synchronization support on heterogeneous cores; (2) code generation
targeting the different instruction sets; (3) data transfers and implement the OpenMP memory model. We present experimental
results for some SPEC OMP 2001 and NAS benchmarks to demonstrate the effectiveness of this approach. A visualization tool
based on Paraver is also used to provide some insights into actual thread and synchronization behaviors.
Keywords OpenMP - Heterogeneous architecture - Thread synchronization - Data transfer