Journal Article
Automation techniques for implementation of hybrid wave-pipelined 2D DWT
G. Seetharaman, B. Venkataramani and G. Lakshminarayanan
Journal of Real-Time Image Processing, 2008, Volume 3, Number 3, Pages 217-229
Book Chapter
Fast Universal Synchronizers
Rostislav (Reuven) Dobkin and Ran Ginosar
Lecture Notes in Computer Science, 2009, Volume 5349, Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, Pages 199-208
Book Chapter
3D Integration Technologies – An Overview
Rajen Chanchani
2009, Materials for Advanced Packaging, Pages 1-50
Book Chapter
Design for Yield
Charles Chiang and Jamil Kawa
Integrated Circuits and Systems, 2007, Design for Manufacturability and Yield for Nano-Scale CMOS, Pages 169-193
Journal Article
Power consumption reduction in systems on Chip (SoCs)
Christian Piguet
Annals of Telecommunications, 2004, Volume 59, Numbers 7-8, Pages 884-902
Book Chapter
On channel architecture and routability for FPGA's under faulty conditions
Kaushik Roy and Sudip Nag
Lecture Notes in Computer Science, 1994, Volume 849, Field-Programmable Logic Architectures, Synthesis and Applications, Pages 361-372
Book Chapter
Interconnect Noise Analysis and Optimization Techniques
2006, Interconnect Noise Optimization in Nanometer Technologies, Pages 29-43
Journal Article
Software pipelining of loops by the method of modulo scheduling
N. I. V’yukova, V. A. Galatenko and S. V. Samborskii
Programming and Computer Software, 2007, Volume 33, Number 6, Pages 307-315
Book Chapter
Compilation and Synthesis Flows
João M. P. Cardoso and Pedro C. Diniz
2009, Compilation Techniques for Reconfigurable Architectures, Pages 33-65
Journal Article
SET Emulation Under a Quantized Delay Model
Mario García Valderas, Luis Entrena, Raúl Fernández Cardenal, Celia López Ongil and Marta Portela García
Journal of Electronic Testing, 2009, Volume 25, Number 1, Pages 107-116