Herein, we investigate methodologies for the construction of intelligent hardware based on neural networks for biosignals classification. The full concept of machine implementation on a chip is also explored. Experimental results based on biosignals are produced using extensive training and evaluation of adaptive neural networks to extract efficient logic functions for hardware construction. The VHDL modeling methodology for the hardware implementation of the derived logic functions on a chip is also presented. In conclusion we have succeeded to formulate a methodology to map neural networks on hardware architectures.